`timescale 1ns/1ns
`define clk_t 20
module camera_init_tb;
reg Clk;
reg Rst_n;
wire Init_Done;
wire camera_rst_n;
wire camera_pwdn;
wire i2c_sclk;
wire i2c_sdat;
reg Go;
pullup PUP(i2c_sdat); //模拟外部上拉电阻
wire DATA_WIDTH;
reg ADDR_WIDTH;
localparam device_id = 8'h78;
localparam addr_mode = 1'b1;
localparam RGB = 0;
localparam JPEG = 1;
parameter IMAGE_WIDTH = 24; //图片宽度
parameter IMAGE_HEIGHT = 6; //图片高度(≤720)
parameter IMAGE_FLIP = 0; //0:不翻转,1:上下翻转
parameter IMAGE_MIRROR = 0; //0:不镜像,1:左右镜像
camera_init
(
.IMAGE_TYPE(RGB),
.IMAGE_WIDTH(IMAGE_WIDTH),
.IMAGE_HEIGHT(IMAGE_HEIGHT),
.IMAGE_FLIP(IMAGE_FLIP),
.IMAGE_MIRROR(IMAGE_MIRROR)
)
camera_init(
.Clk(Clk),
.Rst_n(rst_n),
.Init_Done(Init_Done),
.camera_rst_n(camera_rst_n),
.camera_pwdn(camera_pwdn),
.i2c_sclk(camera_sclk),
.i2c_sdat(camera_sdat)
);
initial Clk = 1'b1;
always #(`clk_t/2) Clk = ~Clk;
initial begin
#2;
Rst_n = 0;
Go = 0;
#(`clk_t*20);
Rst_n = 1;
#(`clk_t*10);
Go = 1;
#(`clk_t);
Go = 0;
#(`clk_t * 15000 * 168);
$stop;
end
endmodule |