TA的每日心情 | 擦汗 2024-3-26 13:58 |
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发表于 2022-8-14 21:22:32
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本帖最后由 CJC 于 2022-8-15 17:13 编辑
#include "stdio.h"
#include "sleep.h"
#include "xgpiops_hw.h"
#include "xgpiops.h"
#include "xil_io.h"
#include "xparameters.h"
#define EMIO_LED0 78
#define EMIO_KEY0 79
uint8_t gpio_get_bank(uint8_t pin);
uint8_t gpio_get_pin_number(uint8_t PinNumber,uint8_t bank);
#define KEY0 ((Xil_In32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(key_bank) * XGPIOPS_DATA_BANK_OFFSET \
+ XGPIOPS_DATA_RO_OFFSET) >> (uint32_t)key_pin_number) & (uint32_t)1)
int main(void)
{
uint8_t bank = 0;
uint8_t pin_number = 0;
uint8_t reg_val = 0;
uint8_t data = 0;
uint32_t reg_offset;
// uint8_t data_value;
uint8_t key_bank;
uint8_t key_pin_number;
/* 得到哪个bank */
bank = gpio_get_bank(EMIO_LED0);
key_bank = gpio_get_bank(EMIO_KEY0);
/* 得到哪个bank哪个引脚 */
pin_number = gpio_get_pin_number(EMIO_LED0, bank);
key_pin_number = gpio_get_pin_number(EMIO_KEY0, key_bank);
if (pin_number > 15U) {
/* 这里仅对写数据有效,因为数据寄存器只能设置16bit */
// data_value = pin_number - (uint8_t)16;
reg_offset = XGPIOPS_DATA_MSW_OFFSET;
} else {
reg_offset = XGPIOPS_DATA_LSW_OFFSET;
}
/* 设置方向为输出 */
reg_val = Xil_In32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_REG_MASK_OFFSET
+XGPIOPS_DIRM_OFFSET);
data = reg_val | (1 << pin_number);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_REG_MASK_OFFSET
+XGPIOPS_DIRM_OFFSET,data);
/* 设置方向为输入 */
reg_val = Xil_In32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(key_bank) * XGPIOPS_REG_MASK_OFFSET
+XGPIOPS_DIRM_OFFSET);
data = reg_val | (1 << key_pin_number);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(key_bank) * XGPIOPS_REG_MASK_OFFSET
+XGPIOPS_DIRM_OFFSET,data);
/* 设置输出使能 */
reg_val = Xil_In32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_REG_MASK_OFFSET
+ XGPIOPS_OUTEN_OFFSET);
data = reg_val | (1 << pin_number);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_REG_MASK_OFFSET
+XGPIOPS_OUTEN_OFFSET,data);
printf("hello zynq\r\n");
while(1)
{
if(KEY0 == 0)
{
/* 设置高16位允许更新低16位改变值 */
// data = (~(1 << 16) | (1 << 0));
data = ~((uint32_t)1 << (pin_number + 16U)) & ((1 << pin_number) | 0xFFFF0000U);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_DATA_MASK_OFFSET
+ reg_offset, data);
usleep(500000);
// data = (~(1 << 16) | ~(1 << 0));
data = ~((uint32_t)1 << (pin_number + 16U)) & ((~(1 << pin_number)) | 0xFFFF0000U);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_DATA_MASK_OFFSET
+ reg_offset, data);
usleep(500000);
}
else
{
data = ~((uint32_t)1 << (pin_number + 16U)) & ((1 << pin_number) | 0xFFFF0000U);
Xil_Out32(XPAR_XGPIOPS_0_BASEADDR + (uint32_t)(bank) * XGPIOPS_DATA_MASK_OFFSET
+ reg_offset, data);
}
}
return 0;
}
uint8_t gpio_get_pin_number(uint8_t PinNumber,uint8_t bank)
{
uint8_t pin_number = 0;
uint32_t XGpioPsPinTable[6] = {0};
XGpioPsPinTable[0] = (u32)25; /* 0 - 25, Bank 0 */
XGpioPsPinTable[1] = (u32)51; /* 26 - 51, Bank 1 */
XGpioPsPinTable[2] = (u32)77; /* 52 - 77, Bank 2 */
XGpioPsPinTable[3] = (u32)109; /* 78 - 109, Bank 3 */
XGpioPsPinTable[4] = (u32)141; /* 110 - 141, Bank 4 */
XGpioPsPinTable[5] = (u32)173; /* 142 - 173 Bank 5 */
pin_number = (uint8_t)((uint32_t)PinNumber %
(XGpioPsPinTable[bank - (uint8_t)1] + (uint32_t)1));
return pin_number;
}
uint8_t gpio_get_bank(uint8_t pin)
{
uint8_t bank;
if (pin >0 && pin <=25)
{
bank = 0;
}
else if (pin >= 26 && pin <= 51)
{
bank = 1;
}
else if (pin >= 52 && pin <= 77)
{
bank = 2;
}
else if (pin >= 78 && pin <= 109)
{
bank = 3;
}
else if (pin >= 110 && pin <= 141)
{
bank = 4;
}
else if (pin >= 142 && pin <= 173)
{
bank = 5;
}
return bank;
}
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